Personal Introduction |
He received a master's degree from Southeast University in 1997 and a doctor's degree in RF integrated circuit design from Hong Kong University of Science and Technology in 2001. His tutor is Howard Luong. He successfully designed the first fully integrated CMOS 900MHz RF transceiver in the world, and the achievement was published on JSSC. After graduation, he joined the Microelectronics Research Institute of Bell Laboratories (later became Agere System Inc.), engaged in the research of high-speed data communication, and developed the first CMOS linear equalizer, which is now widely used in various SerDes designs. Later, he successively worked in Agere systems, LSI, Avago, Global Unichip and other chip design companies, engaged in the research and development of high-speed digital analog hybrid integrated circuit, and mastered the world-class high-speed digital analog hybrid integrated circuit design technology, including 28gb / s SerDes chip and GEPHY chip. In June 2015, he returned to China to join ZTE Corporation. In two and a half years, he led the simulation design team of ZTE to successfully develop three GEPHY chips, all of which have been successfully commercialized. The first two chips have been delivered in mass production and volume, and the total delivery is expected to exceed 50 million units. In 2017, he was rated as a national special expert (long-term innovation). In November 2018, he joined Guangdong University of technology as a distinguished professor, mainly engaged in research on analog and high-speed digital analog hybrid integrated circuits. |
Main Achievements |
§Jinghong Chen;Sheets, G.;Chunbing Guo(郭春炳) ;Saibi, F.;Fuji Yang;Azadet, K.;Jenshan Lin;Zhang, G.“Electrical backplane equalization using programmable analog zeros and folded active inductors”. IEEE Midwest Symposium on Circuit and System, Aug 2005。 §Chunbing Guo(郭春炳), C. W. Lo, T. Choi, I. Hsu, D. Leung, T. Kan, A. Chan, H. C. Luong, "A Fully-Integrated 900-MHz CMOS Wireless Receiver with On-Chip RF and IF Filters and 79-dB Image Rejection," IEEE Journal of Solid-State Circuits (JSSC), Vol. 37, No. 8, pp. 1084-1089, August 2002。 §Chunbing Guo(郭春炳), Chi-Wa Lo, Yu-Wing Choi, Issac Hsu, Toby Kan, David Leung, Alan Chan, and Howard C. Luong, “A Fully-Integrated 900-MHz CMOS Wireless Receiver with On-Chip RF and IF Filters and 79-dB Image Rejection” , 2001 VLSI Circuits Symposium, on June, 12, 2001。 §Chunbing Guo(郭春炳), Alan N. L. Chan and Howard C. Luong, “A Monolithic 2-V 950-MHz CMOS Bandpass Amplifier with A Notch Filter for Wireless Receivers” , 2001 Radio Frequency Integrated Circuits Symposium, on May 20, 2001。 §Alan N. L. Chan, Chunbing Guo(郭春炳), and Howard C. Luong “A 1-V 2.4-GHz CMOS LNA with Source Degeneration as Image-Rejection Notch Filter” , IEEE International Symposium on Circuits and Systems 2001。 §Chunbing GUO(郭春炳) and Howard C. Luong, “A 70-MHz 70-dB-Gain VGA with Automatic Continuous-Time Offset Cancellation”, IEEE Midwest Symposium on Circuit and System, Aug 2000。 §Chunbing GUO(郭春炳), “A Monolithic 900-MHz CMOS Wireless Transceiver”，2001,08。 Intellectual property： §US Patent：Shujiang Wang,Joseph Anidjar,Shawn M. Logan,Chunbing Guo(郭春炳),HaoQiong Chen, Power Supply Noise Injection, 2010/06.20110316504。 §US Patent：Jinghong Chen,Chunbing Guo(郭春炳),Fuji Yang, Multiple frequency generator for quadrature amplitude modulated communications, 2007/10.20080100387。 §US Patent：Chunbing Guo, Fuji Yang,Duty cycle correction circuit for high-speed clock signals, 2007/12.20090160516。 §US Patent：Chunbing Guo(郭春炳), Fuji Yang, Kameran Azadet, Common-mode adjustment in AC coupled CML output buffer, 2005/06.20060017468。 §US Patent：Fuji Yang, Chunbing Guo(郭春炳), “Method and apparatus for receiver detection on a PCI-Express bus” ,2004/07. 20050104623。 §US Patent：Fuji Yang, FadiSaibi, Chunbing Guo(郭春炳), Kameran, Azadet, “Programmable receive-side channel equalizer”, 2003/01.20040141552。 |
Research Team |
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